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the information contained in this document is being issued in advance of the production cycle for the device. the parameters for the device may change before final production or nec corporation, at its own discretion, may withdraw the device prior to its production. document no. u13573ej1v0pm00 (1st edition) date published august 1998 j cp(k) printed in japan 1998 16-bit single-chip microcontroller preliminary product information mos integrated circuit m m m m pd78f4937 the m pd78f4937, 78k/iv series' product, is a flash memory version of the m pd784937 with internal masked rom. data can be written to or erased from the flash memory of the m pd78f4937 with the microcontroller mounted on the printed wiring board. for specific functions and other detailed information, consult the following user's manuals. these manuals are required reading for design work. m m m m pd784937 subseries user's manual, hardware : to be created 78k/iv series user's manual, instruction : u10905e features ? pin-compatible with mask rom model (except v pp pin) ? flash memory: 192k bytes ? internal ram: 8,192 bytes ? same operating voltage as mask rom model (v dd = 4.0 to 5.5 v) ordering information part number package internal rom m pd78f4937gc-8eu 100-pin plastic lqfp (fine pitch) (14 14 mm) flash memory m pd78f4937gf-3ba 100-pin plastic qfp (14 20 mm) flash memory
preliminary product information 2 m m m m pd78f4937 78k/iv series product development diagram : in production : under development standard products development assp development pd784026 a/d converters, 16-bit timers, and power management functions have been enhanced. internal memory has been expanded. pin-compatible with the pd784026 pd784038y pd784038 connectable to the i 2 c bus 100 pins i/o has been enhanced. internal memory has been expanded. pd784216y connectable to the multimaster i 2 c bus pd784054 built-in 10-bit a/d converter pd784046 80 pins rom correction function has been added. pd784225y pd784225 connectable to the multimaster i 2 c bus internal memory has been expanded. rom correction function has been added. pd784218y pd784218 connectable to the multimaster i 2 c bus m m m m m m m m m m m m pd784216 pd784908 built-in iebus tm controller functions of the pd784915 have been enhanced. pd784928y pd784928 connectable to the multimaster i 2 c bus pd784955 dc inverter control pd784915 software servo control built-in analog circuit for vcr timers have been enhanced. m functions of the pd784908 have been enhanced. internal memory has been expanded. rom correction function has been added. pd784937 m m m m m m m
preliminary product information 3 m m m m pd78f4937 functions (1/2) item function number of basic instructions (mnemonics) 113 general-purpose register 8 bits 16 registers 8 banks, or 16 bits 8 registers 8 banks (memory mapping) minimum instruction execution time 160 ns/320 ns/636 ns/1.27 m s (at 12.58 mhz) flash memory 192k bytes internal memory ram 8,192 bytes memory space program and data: 1m byte total 80 input 8 i/o ports input/output 72 led direct drive outputs 24 transistor direct drive 8 additional function pins note n-ch open drain 4 real-time output ports 4 bits 2, or 8 bits 1 iebus controller incorporated (simple version) timer/counter 0 : timer register 1 pulse output capability (16 bits) capture register 1 toggle output compare register 2 pwm/ppg output one-shot pulse output timer/counter 1 : timer register 1 real-time output port (16 bits) capture register 1 capture/compare register 1 compare register 1 timer/counter 2 : timer register 1 pulse output capability (16 bits) capture register 1 toggle output capture/compare register 1 pwm/ppg output compare register 1 timer/counter timer 3 : timer register 1 (16 bits) compare register 1 clock timer interrupt requests are generated at 0.5-second intervals. (a clock timer oscillator is incorporated.) either the main clock (12.58 mhz) or real-timer clock (32.768 khz) can be selected as the input clock. clock output selected from f clk , f clk /2, f clk /4, f clk /8, or f clk /16 (can be used as a 1-bit output port) pwm outputs 12-bit resolution 2 channels serial interface uart/ioe (3-wire serial i/o) : 2 channels (incorporating baud rate generator) csi (3-wire serial i/o) : 2 channels note additional function pins are included in the i/o pins.
preliminary product information 4 m m m m pd78f4937 (2/2) item function a/d converter 8-bit resolution 8 channels watchdog timer 1 channel rom correction function internal (four correction addresses can be set.) external expansion function provided (up to 1m byte) standby halt/stop/idle mode hardware source 27 (20 internals, 7 externals (sampling clock variable input: 1)) software brk or brkcs instruction, operand error nonmaskable 1 internal, 1 external interrupt maskable 19 internals, 6 externals 4-level programmable priority 3 operation statuses: vectored interrupt, macro service, context switching power supply voltage v dd = 4.0 to 5.5 v package 100-pin plastic lqfp (fine pitch) (14 14 mm) 100-pin plastic qfp (14 20 mm)
preliminary product information 5 m m m m pd78f4937 contents 1. differences among models in m m m m pd784937 subseries....................................................6 2. pin configuration (top view) ................................................................................................7 3. block diagram ................................................................................................................ ...........10 4. list of pin functions ........................................................................................................ .......11 4.1 port pins (1/2) ............................................................................................................. .......................... 11 4.1 port pins (2/2) ............................................................................................................. .......................... 12 4.2 non-port pins (1/2) ......................................................................................................... ...................... 13 4.2 non-port pins (2/2) ......................................................................................................... ...................... 14 4.3 i/o circuits for pins and handling of unused pins ........................................................................... 15 5. internal memory switching (ims) register....................................................................18 6. flash memory programming................................................................................................19 6.1 selecting the transmission method ........................................................................................... ........ 19 6.2 flash memory programming functions .......................................................................................... ... 20 6.3 connecting the flashpro iii ................................................................................................. ................ 20 7. package drawings ............................................................................................................. ......21 appendix a development tools...............................................................................................23 appendix b related documents ..............................................................................................26
preliminary product information 6 m m m m pd78f4937 1. differences among models in m m m m pd784937 subseries the only difference among the m pd784935, m pd784936, and m pd784937 models lie in the internal memory capacity. the m pd78f4937 has a 192k-byte flash memory instead of the mask rom featured by the m pd784935, m pd784936, and m pd784937. table 1-1 shows the differences among these products. table 1-1. differences among models in m m m m pd784937 subseries product item m pd784935 m pd784936 m pd784937 m pd78f4937 96k bytes 128k bytes 192k bytes internal rom mask rom flash memory internal ram 5,120 bytes 6,656 bytes 8,192 bytes regulator provided none internal memory switching register note none provided ic pin provided none v pp pin none provided note the internal flash memory capacity and internal ram capacity can be changed by setting the internal memory switching register (ims).
preliminary product information 7 m m m m pd78f4937 2. pin configuration (top view) ? 100-pin plastic lqfp (fine pitch) (14 14 mm) m pd78f4937gc-8eu cautions 1. in normal operation, connect the v pp pin directly to the v ss pin. 2. connect the av dd pin directly to the v dd pin. 3. connect the av ss pin directly to the v ss pin. p73/ani3 p72/ani2 p71/ani1 p70/ani0 v pp pwm1 pwm0 p17 p16 p15 p14/txd2/so2 p13/rxd2/si2 p12/asck2/sck2 p11 p10 astb/clkout p90 p91 p92 p93 p94 p95 p96 p97 p40/ad0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 p37/to3 p36/to2 p35/to1 p34/to0 p33/so0 p32/sck0 p31/txd/so1 p30/rxd/si1 p27/si0 p26/intp5 p25/intp4/asck/sck1 p24/intp3 p23/intp2/ci p22/intp1 p21/intp0 p20/nmi tx rx av ss av ref1 av dd p77/ani7 p76/ani6 p75/ani5 p74/ani4 p67/refrq/hldak p66/wait/hldrq p65/wr p64/rd p63/a19 p62/a18 p61/a17 p60/a16 p57/a15 p56/a14 p55/a13 p54/a12 v ss v dd p53/a11 p52/a10 p51/a9 p50/a8 p47/ad7 p46/ad6 p45/ad5 p44/ad4 p43/ad3 p41/ad1 p42/ad2 p100 p101 p102 p103 p104 p105/sck3 p106/si3 p107/so3 reset xt2 xt1 v ss x2 x1 regoff regc v dd p00 p01 p02 p03 p04 p05 p06 p07 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
preliminary product information 8 m m m m pd78f4937 ? 100-pin plastic qfp (14 20 mm) m pd78f4937gf-3ba cautions 1. in normal operation, connect the v pp pin directly to the v ss pin. 2. connect the av dd pin directly to the v dd pin. 3. connect the av ss pin directly to the v ss pin. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 p36/t02 p37/t03 p100 p101 p102 p103 p104 p105/sck3 p106/si3 p107/so3 reset xt2 xt1 v ss x2 x1 regoff regc v dd p00 p01 p02 p03 p04 p05 p06 p07 p67/refrq/hldak p66/wait/hldrq p65/wr p76/ani6 p75/ani5 p74/ani4 p73/ani3 p72/ani2 p71/ani1 p70/ani0 v pp pwm1 pwm0 p17 p16 p15 p14/txd2/so2 p13/rxd2/si2 p12/asck2/sck2 p11 p10 astb/clkout p90 p91 p92 p93 p94 p95 p96 p97 p40/ad0 p41/ad1 p42/ad2 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 p35/to1 p34/to0 p33/so0 p32/sck0 p31/txd/so1 p30/rxd/si1 p27/si0 p26/intp5 p25/intp4/asck/sck1 p24/intp3 p23/intp2/ci p22/intp1 p21/intp0 p20/nmi tx rx av ss av ref1 av dd p77/ani7 p64/rd p63/a19 p62/a18 p61/a17 p60/a16 p57/a15 p56/a14 p55/a13 p54/a12 v ss v dd p53/a11 p52/a10 p51/a9 p50/a8 p47/ad7 p46/ad6 p45/ad5 p44/ad4 p43/ad3
preliminary product information 9 m m m m pd78f4937 a8-a19 : address bus pwm0, pwm1 : pulse width modulation output ad0-ad7 : address/data bus rd : read strobe ani0-ani7 : analog input refrq : refresh request asck, asck2 : asynchronous serial clock regc : regulator capacitance astb : address strobe regoff : regulator off av dd : analog power supply reset : reset av ref1 : reference voltage rx : iebus receive data av ss : analog ground rxd, rxd2 : receive data ci : clock input sck0-sck3 : serial clock clkout : clock output si0-si3 : serial input hldak : hold acknowledge so0-so3 : serial output hldrq : hold request to0-to3 : timer output intp0-intp5 : interrupt from peripherals tx : iebus transmit data nmi : non-maskable interrupt txd, txd2 : transmit data p00-p07 : port 0 v dd : power supply p10-p17 : port 1 v pp : programming power supply p20-p27 : port 2 v ss : ground p30-p37 : port 3 wait : wait p40-p47 : port 4 wr : write strobe p50-p57 : port 5 x1, x2 : crystal (main system clock) p60-p67 : port 6 xt1, xt2 : crystal (watch) p70-p77 : port 7 p90-p97 : port 9 p100-p107 : port 10
preliminary product information 10 m m m m pd78f4937 3. block diagram programmable interrupt controller timer/counter0 (16 bits) timer/counter1 ( 16 bits) timer/counter2 (16 bits) timer3 (16 bits) real-time output port a/d converter pwm 78 k/iv cpu core (ram 512 bytes) flash memory (192k bytes) ram (8,192 bytes) uart/ioe2 uart/ioe1 baud-rate generator baud-rate generator clocked serial interface clock output bus i/f port 0 port 1 port 2 port 3 port 4 port 5 port 6 port 7 nmi intp3 to0 to1 intp0 intp1 intp2/ci to2 to3 p00-p03 p04-p07 pwm0 pwm1 av dd av ref1 av ss intp5 ani0-ani7 intp0-intp5 rxd/si1 txd/so1 asck/sck1 rxd2/si2 asck2/sck2 txd2/so2 sck0 so0 si0 astb/clkout ad0-ad7 a8-a15 a16-a19 rd wr wait/hldrq refrq/hldak d0-d7 ce a0-a16 oe pgm p00-p07 p10-p17 p30-p37 p40-p47 p50-p57 p20-p27 p60-p67 p70-p77 clocked serial interface3 sck3 so3 si3 port 9 port 10 p90-p97 p100-p107 tx rx reset x1 x2 regc regoff v pp v dd v ss xt1 xt2 system control (regulator) iebus controller watch timer watchdog timer
preliminary product information 11 m m m m pd78f4937 4. list of pin functions 4.1 port pins (1/2) pin i/o dual-function function p00-p07 i/o - port 0 (p0): 8-bit i/o port. functions as a real-time output port (4 bits 2). inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. can drive a transistor. p10 - p11 - p12 asck2/sck2 p13 rxd2/si2 p14 txd2/so2 p15-p17 i/o - port 1 (p1): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. can drive led. p20 nmi p21 intp0 p22 intp1 p23 intp2/ci p24 intp3 p25 intp4/asck/sck1 p26 intp5 p27 input si0 port 2 (p2): 8-bit input-only port. p20 does not function as a general-purpose port (nonmaskable interrupt). however, the input level can be checked by an interrupt service routine. the use of pull-up resistors can be specified by software for pins p22 to p27 (in units of 6 bits). the p25/intp4/asck/sck1 pin functions as the sck1 i/o pin by csim1. p30 rxd/si1 p31 txd/so1 p32 sck0 p33 so0 p34-p37 i/o to0-to3 port 3 (p3): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. p32 and p33 can be set as the n-ch open-drain pin. p40-p47 i/o ad0-ad7 port 4 (p4): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. can drive led.
preliminary product information 12 m m m m pd78f4937 4.1 port pins (2/2) pin i/o dual-function function p50-p57 i/o a8-a15 port 5 (p5): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. can drive led. p60-p63 a16-a19 p64 rd p65 wr p66 wait/hldrq p67 i/o refrq/hldak port 6 (p6): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. p70-p77 i/o ani0-ani7 port 7 (p7): 8-bit i/o port. inputs and outputs can be specified bit by bit. p90-p97 i/o - port 9 (p9): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. p100-p104 - p105 sck3 p106 si3 p107 i/o so3 port 10 (p10): 8-bit i/o port. inputs and outputs can be specified bit by bit. the use of pull-up resistors can be simultaneously specified by software for all pins in input mode. p105 and p107 can be set as the n-ch open-drain pin.
preliminary product information 13 m m m m pd78f4937 4.2 non-port pins (1/2) pin i/o dual-function function to0-to3 output p34-p37 timer output ci input p23/intp2 input of a count clock for timer/counter 2 rxd p30/si1 serial data input (uart0) rxd2 input p13/si2 serial data input (uart2) txd p31/so1 serial data output (uart0) txd2 output p14/so2 serial data output (uart2) asck p25/intp4/sck1 baud rate clock input (uart0) asck2 input p12/sck2 baud rate clock input (uart2) si0 p27 serial data input (3-wire serial i/o0) si1 p30/rxd serial data input (3-wire serial i/o1) si2 p13/rxd2 serial data input (3-wire serial i/o2) si3 input p106 serial data input (3-wire serial i/o3) so0 p33 serial data output (3-wire serial i/o0) so1 p31/txd serial data output (3-wire serial i/o1) so2 p14/txd2 serial data output (3-wire serial i/o2) so3 output p107 serial data output (3-wire serial i/o3) sck0 p32 serial clock i/o (3-wire serial i/o0) sck1 p25/intp4/asck serial clock i/o (3-wire serial i/o1) sck2 p12/asck serial clock i/o (3-wire serial i/o2) sck3 i/o p105 serial clock i/o (3-wire serial i/o3) nmi p20 - intp0 p21 input of a count clock for timer/counter 1 capture/trigger signal for cr11 or cr12 intp1 p22 input of a count clock for timer/counter 2 capture/trigger signal for cr22 intp2 p23/ci input of a count clock for timer/counter 2 capture/trigger signal for cr21 intp3 p24 input of a count clock for timer/counter 0 capture/trigger signal for cr02 intp4 p25/asck/sck1 - intp5 input p26 external interrupt request input of a conversion start trigger for a/d converter ad0-ad7 i/o p40-p47 time multiplexing address/data bus (for connecting external memory) a8-a15 output p50-p57 high-order address bus (for connecting external memory) a16-a19 output p60-p63 high-order address during address expansion (for connecting external memory) rd output p64 strobe signal output for reading the contents of external memory wr output p65 strobe signal output for writing on external memory wait input p66/hldrq wait signal insertion refrq output p67/hldak refresh pulse output to external pseudo static memory hldrq input p66/wait input of bus hold request hldak output p67/refrq output of bus hold response astb output clkout latch timing output of time multiplexing address (a0-a7) (for connecting external memory)
preliminary product information 14 m m m m pd78f4937 4.2 non-port pins (2/2) pin i/o dual-function function clkout output astb clock output pwm0 output - pwm output 0 pwm1 output - pwm output 1 rx input - data input (iebus) tx output - data output (iebus) regc -- capacitor connection for stabilizing the regulator output regoff -- signal for specifying regulator operation reset input - chip reset x1 input x2 - - crystal input for system clock oscillation (a clock pulse can also be i nput to the x1 pin.) xt1 input - xt2 -- real-time clock connection pin ani0-ani7 input p70-p77 analog voltage inputs for the a/d converter av ref1 application of a/d converter reference voltage av dd positive power supply for the a/d converter av ss ground for the a/d converter v dd positive power supply v ss - ground v pp input - this pin is used to set the flash memory programming mode and applies a high voltage when a program is written or verified. in normal operation mode, connect this pin directly to the v ss pin.
preliminary product information 15 m m m m pd78f4937 4.3 i/o circuits for pins and handling of unused pins table 4-1 describes the types of i/o circuits for pins and the handling of unused pins. figure 4-1 shows the configuration of these various types of i/o circuits. table 4-1. types of i/o circuits for pins and handling of unused pins (1/2) pin i/o circuit type i/o recommended connection method for unused pins p00-p07 p10, p11 5-a p12/asck2/sck2 8-a p13/rxd2/si2 p14/txd2/so2 p15-p17 5-a i/o input state: connect these pins to the v dd pin. output state: leave these pins open. p20/nmi p21/intp0 2 connect these pins to the v dd or v ss pin. p22/intp1 p23/intp2/ci p24/intp3 2-a input connect these pins to the v dd pin. p25/intp4/asck/sck1 8-a i/o input state: connect this pin to the v dd pin. output state: leave this pin open. p26/intp5 p27/si0 2-a input connect these pins to the v dd pin. p30/rxd/si1 p31/txd/so1 5-a p32/sck0 p33/so0 10-a p34/to0-p37/to3 p40/ad0-p47/ad7 p50/a8-p57/a15 p60/a16-p63/a19 p64/rd p65/wr p66/wait/hldrq p67/refrq/hldak 5-a i/o input state: connect these pins to the v dd pin. output state: leave these pins open. p70/ani0-p77/ani7 20 p90-p97 p100-p104 5-a p105/sck3 10-a p106/si3 8-a p107/so3 10-a i/o input state: connect these pins to the v dd or v ss pin. output state: leave these pins open. astb/clkout 4 output leave this pin open.
preliminary product information 16 m m m m pd78f4937 table 4-1. types of i/o circuits for pins and handling of unused pins (2/2) pin i/o circuit type i/o recommended connection method for unused pins reset 2 input - xt2 -- leave this pin open. xt1 - input connect this pin to the v ss pin. regoff 1 - regc -- connect these pins to the v dd pin. pwm0, pwm1 3 output leave this pin open. rx 2 input connect this pin to the v dd or v ss pin. tx 3 output leave this pin open. av ref1 av ss connect these pins to the v ss pin. av dd - connect this pin to the v dd pin. v pp - input connect this pin directly to the v ss pin. caution when the i/o mode of an i/o dual-function pin is unpredictable, connect the pin to v dd through a resistor of 10 to 100 kilohms (particularly when the voltage of the reset input pin becomes higher than that of the low level input at power-on or when i/o is switched by software). remark since type numbers are consistent in the 78k series, those numbers are not always serial in each product. (some circuits are not included.)
preliminary product information 17 m m m m pd78f4937 figure 4-1. i/o circuits for pins type 1 type 2-a in v dd p n type 2 schmitt trigger input with hysteresis characteristics in v dd p pull-up enable type 5-a in schmitt trigger input with hysteresis characteristics type 3 data out v dd p-ch n-ch type 4 data v dd p n in/out output disable v dd p pull-up enable input enable type 8-a data v dd p n out output disable push-pull output which can output high impedance (both the positive and negative channels are off.) type 10-a data v dd p n in/out output disable v dd p pull-up enable type 20 data v dd p n in/out output disable v dd p pull-up enable open drain type 12 n p analog output voltage out data comparator v dd v ref p (threshold voltage) p n n in/out output disable input enable + C
preliminary product information 18 m m m m pd78f4937 5. internal memory switching (ims) register this register enables the software to avoid using part of the internal memory. the ims register can be set to establish the same memory mapping as used in rom products that have different internal memory (rom and ram) configurations. the ims register is set using 8-bit memory operation instructions. a reset input sets the ims register to ffh. figure 5-1. internal memory switching (ims) register 7 1 6 1 5 rom1 4 rom0 3 1 2 1 1 ram1 0 ram0 ims internal rom capacity selection rom1 rom0 internal ram capacity selection ram1 ram0 0 0 1 1 0 1 0 1 not to be set 5,120 bytes 6,656 bytes 8,192 bytes 0 0 1 1 0 1 0 1 not to be set 96k bytes 128k bytes 192k bytes address: 0fffch when reset: ffh w/r caution the ims is not contained in a mask rom product ( m m m m pd784935, m m m m pd784936, or m m m m pd784937). the ims setting to obtain the same memory map as masked rom products are shown in table 5-1. table 5-1. internal memory switching register (ims) setting value product ims setting value m pd784935 ddh m pd784936 eeh m pd784937 ffh
preliminary product information 19 m m m m pd78f4937 6. flash memory programming the flash memory can be written even while the device is mounted in the target system (on-board write). to write a program into the flash memory, connect the dedicated flash writer (flashpro iii) to both the host machine and target system. remark the flashpro iii is manufactured by naito densei machida mfg. co., ltd. 6.1 selecting the transmission method the flashpro iii writes into flash memory by means of serial transmission. the transmission method to be used for writing is selected from those listed in table 6-1. to select a transmission method, use the format shown in figure 6-1, according to the number of v pp pulses listed in table 6-1. table 6-1. transmission methods transmission method number of channels pins number of v pp pulses 3-wire serial i/o 1 sck3/p105 so3/p107 si3/p106 0 uart 1 txd/so1/p31 rxd/si1/p30 8 caution to select a transmission method, always use the corresponding number of v pp pulses listed in table 6-1. figure 6-1. format of transmission method selection 12 n 10 v v dd v ss v dd v ss reset v pp
preliminary product information 20 m m m m pd78f4937 6.2 flash memory programming functions flash memory writing and other operations can be performed by transmitting/receiving commands and data according to the selected transmission method. table 6-2 lists the main flash memory programming functions. table 6-2. main flash memory programming functions function description batch erase erases the entire contents of memory. block erase erases the contents of specified memory block. batch blank check checks that the entire contents of memory have been erased. block blank check checks that the contents of specified block have been erased. data write write to the flash memory according to the specified write start address and number of bytes of data to be written. batch verify compares the entire contents of memory with the input data. block verify compares the contents of specified memory block with the input data. 6.3 connecting the flashpro iii the connection between the flashpro iii and m pd78f4937 varies with the transmission method. figures 6-2 and 6-3 show the connection for each transmission method. figure 6-2. flashpro iii connection in 3-wire serial i/o mode v pp v dd reset sck so si v ss v pp v dd reset sck si so v ss flashpro iii pd78f4937 m figure 6-3. flashpro iii connection in uart mode v pp v dd reset so si v ss v pp v dd reset rxd txd v ss flashpro iii pd78f4937 m
preliminary product information 21 m m m m pd78f4937 7. package drawings 100pin plastic qfp (14x20) item millimeters inches note each lead centerline is located within 0.15 mm (0.006 inch) of its true position (t.p.) at maximum material condition. p100gf-65-3ba1-3 b 20.0 0.2 0.795 +0.009 e0.008 c 14.0 0.2 0.551 +0.009 e0.008 d 17.6 0.4 0.693 0.016 f 0.8 0.031 g 0.6 0.024 h 0.30 0.10 0.012 i 0.15 0.006 j 0.65 (t.p.) 0.026 (t.p.) k 1.8 0.2 0.071 +0.008 e0.009 l 0.8 0.2 0.031 n 0.10 0.004 q 0.1 0.1 0.004 0.004 s 3.0 max. 0.119 max. detail of lead end r q j k m l n p g f h i m p 2.7 0.1 0.106 +0.005 e0.004 80 81 50 100 1 31 30 51 b a cd s a 23.6 0.4 0.929 0.016 m 0.15 0.006 +0.10 e0.05 r5 5 5 5 +0.004 e0.005 +0.009 e0.008 +0.004 e0.003 remark the shape and material of the es product is the same as the mass produced product.
preliminary product information 22 m m m m pd78f4937 100 pin plastic lqfp (fine pitch) (14 14) item millimeters inches note each lead centerline is located within 0.08 mm (0.003 inch) of its true position (t.p.) at maximum material condition. s100gc-50-8eu f 1.00 0.039 b 14.00 0.20 0.551 +0.009 e0.008 s 1.60 max. 0.063 max. l 0.50 0.20 0.020 +0.008 e0.009 +0.009 e0.008 c 14.00 0.20 0.551 +0.009 e0.008 a 16.00 0.20 0.630 0.008 g 1.00 0.039 h 0.22 0.009 0.002 i 0.08 0.003 j 0.50 (t.p.) 0.020 (t.p.) k 1.00 0.20 0.039 +0.009 e0.008 n 0.08 0.003 p 1.40 0.05 0.055 0.002 r3 3 +7 e3 +7 e3 d 16.00 0.20 0.630 0.008 m q r k m l j h i f g p n detail of lead end m 0.17 0.007 +0.001 e0.003 +0.03 e0.07 q 0.10 0.05 0.004 0.002 +0.05 e0.04 1 25 26 50 100 76 75 51 cd s a b remark the shape and material of the es product is the same as the mass produced product.
preliminary product information 23 m m m m pd78f4937 appendix a development tools the following development tools are available for system development using the m pd78f4937. see also (5) . (1) language processing software ra78k4 assembler package used in common with 78k/iv series cc78k4 c compiler package used in common with 78k/iv series df784937 device file for m pd784937 subseries cc78k4-l c compiler library source file used in common with 78k/iv series (2) flash memory write tools flashpro ill note (pg-fpiii) flash writer used only for microcontrollers with internal flash memory fa-100gf flash memory writing adapter for 100-pin plastic qfp (gf-3ba type). wiring must be performed according to product being used. fa-100gc flash memory writing adapter for 100-pin plastic lqfp (gc-8eu type). wiring must be performed according to product being used. flashpro iii controller note program controlled by a personal computer and which is supported by flashpro iii. runs under windows tm 95, etc. (3) debugging tools when using the in-circuit emulator ie-78k4-ns ie-78k4-ns in-circuit emulator used in common with 78k/iv series ie-70000-mc-ps-b power supply unit for ie-78k4-ns ie-70000-98-if-c interface adapter when the pc-9800 series computer (other than a notebook) is used as the host machine ie-70000-cd-if-c pc card and interface cable when a pc-9800 series notebook is used as the host machine ie-70000-pc-if-c interface adapter when the ibm pc/at tm compatible is used as the host machine ie-784937-ns-em1 note emulation board for emulating m pd784937 subseries np-100gf emulation probe for 100-pin plastic qfp (gf-3ba type) np-100gc emulation probe for 100-pin plastic lqfp (gc-8eu type) ev-9200-gf-100 socket for mounting on target system board made for 100-pin plastic qfp (gf- 3ba type) tgc-100sdw conversion adapter for connecting the target system board made for 100-pin plastic lqfp (gc-8eu type) with np-100gc id78k4-ns integrated debugger for ie-78k4-ns sm78k4 system simulator used in common with 78k/iv series df789437 device file for m pd784937 subseries note under development
preliminary product information 24 m m m m pd78f4937 when using the in-circuit emulator ie-784000-r ie-784000-r in-circuit emulator used in common with 78k/iv series ie-70000-98-if-b ie-70000-98-if-c interface adapter when the pc-9800 series computer (other than a notebook) is used as the host machine ie-70000-98n-if interface adapter and cable when a pc-9800 series notebook is used as the host machine ie-70000-pc-if-b ie-70000-pc-if-c interface adapter when the ibm pc/at compatible is used as the host machine ie-78000-r-sv3 interface adapter and cable when the ews is used as the host machine ie-784937-ns-em1 note ie-784937-r-em1 note emulation board for emulating m pd784937 subseries ie-78400-r-em emulation board used in common with 78k/iv series ie-78k4-r-ex2 note conversion board for emulation probes required to use the ie-784937-ns-em1 on the ie-784000-r. the board is not needed when the ie-784937-r-em1 is used. ep-78064gf-r emulation probe for 100-pin plastic qfp (gf-3ba type) ep-78064gc-r emulation probe for 100-pin plastic lqfp (gc-8eu type) ev-9200gf-100 socket for mounting on target system board made for 100-pin plastic qfp (gf-3ba type) tgc-100sdw conversion adapter for connecting the target system board made for 100-pin plastic lqfp (gc-8eu type) with np-100gc id78k4 integrated debugger for ie-784000-r sm78k4 system simulator used in common with 78k/iv series df784937 device file for m pd784937 subseries note under development (4) real-time os rx78k/iv real-time os for 78k/iv series mx78k4 os for the 78k/iv series
preliminary product information 25 m m m m pd78f4937 (5) notes when using development tools the id78k4-ns, id78k4, and sm78k4 can be used in combination with the df784937. the cc78k4 and rx78k/iv can be used in combination with the ra78k4 and df784937. the flashpro iii, fa-100gf, fa-100gc, np-100gf, and np-100gc are manufactured by naito densei machida mfg. co., ltd. (044-822-3813). consult the nec sales representative for purchasing. the tgc-100sdw is a product from tokyo eletech corporation. refer to: daimaru kogyo, ltd. tokyo electronic components division (03-3820-7112) osaka electronic components division (06-244-6672) the host machines and operating systems corresponding to each software are shown below. pc ews host machine [os] software pc-9800 series [windows] ibm pc/at compatibles [japanese/english windows] hp9000 series 700 tm [hp-ux tm ] sparcstation tm [sunos tm , solaris tm ] news tm (risc) [news-os tm ] ra78k4 o note o cc78k4 o note o id78k4-ns o- id78k4 oo sm78k4 o- rx78k/iv o note o mx78k4 o note o note software under ms-dos
preliminary product information 26 m m m m pd78f4937 appendix b related documents documents related to devices document no. document name japanese english m pd784935, 784936, 784937 preliminary product information u13572j to be created m pd78f4937 preliminary product information u13573j this manual m pd784937 subseries user's manual, hardware to be created to be created m pd784937 subseries special function registers to be created - 78k/iv series user's manual, instruction u10905j u10905e 78k/iv series instruction summary sheet u10594j - 78k/iv series instruction set u10595j - 78k/iv series application note, software basic u10095j u10095e documents related to development tools (user's manual) document no. document name japanese english operation u11334j u11334e ra78k series assembler package language u11162j u11162e ra78k series structured assembler preprocessor u11743j u11743e operation u11571j u11571e cc78k series c compiler language u11572j u11572e ie-78k4-ns u13356j to be created ie-784000-r u12903j eeu-1534 ie-784937-r-em1 to be created to be created ie-784937-ns-em1 to be created to be created ep-78064 eeu-934 eeu-1469 sm78k4 system simulator windows base reference u10093j u10093e sm78k series system simulator external parts user open interface specifications u10092j u10092e id78k4-ns integrated debugger reference u12796j u12796e id78k4 integrated debugger windows base reference u10440j u10440e id78k4 integrated debugger hp-ux, sunos, news-os base reference u11960j u11960e caution the above documents may be revised without notice. use the latest versions when you design application systems.
preliminary product information 27 m m m m pd78f4937 documents related to software to be incorporated into the product (user's manual) document no. document name japanese english basic u10603j u10603e installation u10604j u10604e 78k/iv series real-time os debugger u10364j - os for 78k/iv series mx78k4 u11779j - other documents document no. document name japanese english ic package manual c10943x smd surface mount technology manual c10535j c10535e quality grades on nec semiconductor device c11531j c11531e nec semiconductor device reliability/quality control system c10983j c10983e guide to prevent damage for semiconductor devices by electrostatic discharge (esd) c11892j c11892e semiconductor device quality control/reliability handbook c12769j - guide for products related to microcomputer: other companies u11416j - caution the above documents may be revised without notice. use the latest versions when you design application systems.
preliminary product information 28 m m m m pd78f4937 [memo]
preliminary product information 29 m m m m pd78f4937 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed imme- diately after power-on for devices having reset function.
preliminary product information 30 m m m m pd78f4937 iebus is a trademark of nec corporation. windows is a registered trademark or a trademark of microsoft corporation in the united states and/or other countries. pc/at is a trademark of ibm corporation. hp9000 series 700 and hp-ux are trademarks of hewlett-packard company. sparcstation is a trademark of sparc international, inc. solaris and sunos are trademarks of sun microsystems, inc. news and news-os are trademarks of sony corporation.
preliminary product information 31 m m m m pd78f4937 regional information some information contained in this document may vary from country to country. before using any nec product in your application, piease contact the nec office in your country to obtain a list of authorized representatives and distributors. they will verify: device availability ordering information product release schedule availability of related technical literature development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, ac supply voltages, and so forth) network requirements in addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. nec electronics inc. (u.s.) santa clara, california tel: 408-588-6000 800-366-9782 fax: 408-588-6130 800-729-9288 nec electronics (germany) gmbh duesseldorf, germany tel: 0211-65 03 02 fax: 0211-65 03 490 nec electronics (uk) ltd. milton keynes, uk tel: 01908-691-133 fax: 01908-670-290 nec electronics italiana s.r.1. milano, italy tel: 02-66 75 41 fax: 02-66 75 42 99 nec electronics (germany) gmbh benelux office eindhoven, the netherlands tel: 040-2445845 fax: 040-2444580 nec electronics (france) s.a. velizy-villacoublay, france tel: 01-30-67 58 00 fax: 01-30-67 58 99 nec electronics (france) s.a. spain office madrid, spain tel: 01-504-2787 fax: 01-504-2860 nec electronics (germany) gmbh scandinavia office taeby, sweden tel: 08-63 80 820 fax: 08-63 80 388 nec electronics hong kong ltd. hong kong tel: 2886-9318 fax: 2886-9022/9044 nec electronics hong kong ltd. seoul branch seoul, korea tel: 02-528-0303 fax: 02-528-4411 nec electronics singapore pte. ltd. united square, singapore 1130 tel: 65-253-8311 fax: 65-250-3583 nec electronics taiwan ltd. taipei, taiwan tel: 02-719-2377 fax: 02-719-5951 nec do brasil s.a. cumbica-guarulhos-sp, brasil tel: 011-6465-6810 fax: 011-6465-6829 j98. 2
m m m m pd78f4937 some related documents may be preliminary versions. note that, however, what documents are preliminary is not indicated in this document. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec corporation. nec corporation assumes no responsibility for any errors which may appear in this document. nec corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. no license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec corporation or others. while nec corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. to minimize risks of damage or injury to persons or property arising from a defect in an nec semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. nec devices are classified into the following three quality grades: "standard", "special", and "specific". the specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. the recommended applications of a device depend on its quality grade, as indicated below. customers must check the quality grade of each device before using it in a particular application. standard: computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots special: transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) specific: aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. the quality grade of nec devices is "standard" unless otherwise specified in nec's data sheets or data books. if customers intend to use nec devices for applications other than those specified for standard quality grade, they should contact an nec sales representative in advance. anti-radioactive design is not implemented in this product. m4 96. 5

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